The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 1994

Filed:

Jun. 09, 1993
Applicant:
Inventors:

Daniel C Lineberry, Lexington, NC (US);

Warren A Bates, Winston-Salem, NC (US);

Assignee:

The Whitaker Corporation, Wilmington, DE (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R / ;
U.S. Cl.
CPC ...
439 62 ; 439 65 ; 439 67 ; 439 77 ;
Abstract

A zero insertion force ('ZIF') electrical connector for mating the card edge of a daughter-board (7) orthogonally with respect to the surface of a mother-board (5). The connector includes a stacked plurality of compressible electrical contacts (30-1 . . . n, 32-1 . . . n) separated by a plurality of insulating plates (40-1 . . . n, 42-1 . . . n). End caps (26) are anchored to the mother-board (5) and mount the compressible electrical contacts (30-1 . . . n, 32-1 . . . n) and insulating plates (40-1 . . . n, 42-1 . . . n) in a stacked array with each compressible electrical contact (30-1 . . . n, 32-1 . . . n) bridging the junction of the mother-board (5) and daughter-board (7). This way, the array of compressible electrical contacts (30-1 . . . n, 32-1 . . . n) cumulatively complete multiple rows of high-density electrical connections between the mother-board (5) and daughter-board (7).


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