The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 1994

Filed:

Mar. 30, 1992
Applicant:
Inventor:

Yoshio Sakata, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395162 ; 358448 ; 345197 ; 36518912 ;
Abstract

32-bit image data transferred through an image data bus is input to a thinning out circuit through a bus I/F, and is thinned out by the thinning out circuit to have an active data width of 24 bits. The 32-bit data including the active data width of 24 bits obtained by the thinning out operation is supplied to a line buffer block. The line buffer block has a data width equal to or larger than the maximum bit width of the image data bus. The 32-bit data supplied to the line buffer block is directly written in the line buffer block. The data written in the line buffer block is repetitively shifted by a shift register block according to the active data width of 24 bits.


Find Patent Forward Citations

Quick Actions:

Sakata, Yoshio. (1994). Parallel/serial data conversion system (U.S. Patent No. 5337409). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5337409

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…