Read/write control device for random access memory

Abstract

A first threshold value for detecting a potential indicating a read state, and a second threshold value for detecting a write state are set in an inverter circuit, to which a read/write signal R/W for setting the state of a memory cell is supplied, by means of a P-channel transistor, an N-channel transistor, and another P-channel transistor which is much smaller in gate width than the above transistors. The first or second threshold value is selected by a logic circuit constituted by an inverter circuit and a delay circuit in accordance with the level of the read/write signal R/W. Therefore, a change from a read state to a write state and a reverse change can be detected at high speed, thus providing a read/write control circuit for a random access memory, which can increase the speed of a read operation immediately after a write operation while ensuring a sufficient data write time, and can shorten the write recovery time.