The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 1994

Filed:

Nov. 24, 1992
Applicant:
Inventors:

Bernard Desrosiers, Boissise le Roi, FR;

Didier Louis, Fontainebleau, FR;

Andre Steimle, Evry, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364748 ;
Abstract

A numeric data coprocessor having an execution unit adapted to efficiently execute addition/subtraction operations on floating-point numbers in compliance with the IEEE standard 754. The mantissa adder carry out bit resulting from the operation on two operands X and Y is directly concatenated with the mantissa adder result in the mantissa output register to be the MSB thereof. Simultaneously, a 1 is added to the exponent of operand X or Y with the highest value. The final result is found after normalizing, regardless of whether the carry out bit is 1 or 0. In its hardware embodiment, taking for example the 80-bit double extended precision IEEE format, the mantissa output register has 68 positions. The 68th supplementary position is fed by the carry out bit generated by the mantissa adder at the 'carry out' output. The 'Force Carry' input of the exponent adder is activated by the control logic circuitry to add a 1 to the operand exponent with the highest value.


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