The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 1994

Filed:

Jul. 08, 1992
Applicant:
Inventor:

Keiro Komatsu, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
437105 ; 437107 ; 437129 ; 385129 ; 385130 ;
Abstract

A semiconductor optical guided-wave device which makes quantization and integration possible and which is fine in structure and low in loss is provided, which comprises a semiconductor substrate, at least one ridge type semiconductor optical waveguide formed thereon and at least one pair of electrodes for applying an electric field to the waveguide. The ridge of the optical waveguide is formed by a selective crystal growth process. The ridge can be realized preferably in such a method that a mask having an opening at a position where a ridge is formed is patterned to a layer on which the ridge is formed, and the crystal growth of a material for forming the ridge is made by a crystal growth technology such as the MOVPE method. The mask to be used for the crystal growth purpose is preferable to be a thin dielectric film such as, for example, SiO.sub.2 film. The semiconductor optical waveguide preferably comprises grown layers including a first semiconductor cladding layer, a semiconductor guiding and a second semiconductor cladding layer grown in this order and a ridge having a third semiconductor cladding layer and a semiconductor capping layer laminated in this order on the second semiconductor cladding layer.


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