The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 1994

Filed:

Jan. 10, 1992
Applicant:
Inventors:

Chie Ohkubo, Tokyo, JP;

Yasuhiko Hagihara, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364717 ;
Abstract

An artificial random-number pattern generating circuit has a plurality of flip-flops each having a set signal input terminal and a clock signal input terminal; a plurality of selectors each of which forwards its output to the corresponding flip-flop and receives a first operation mode signal and/or a second operation mode signal; and an exclusive logical OR gate. The artificial random-number pattern generating circuit functions in three different ways, that is, as an artificial random-number pattern generator, a boundary scanning buffer or an input buffer, in accordance with the combinations of the first and second operation mode signals. The circuit can make not only a diagnosis of failure in the internal circuit of the large-scale integration (LSI) but also overall tests including those for input and output buffer circuits of the mounted LSI chip on a board or those for external wirings for the LSI.


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