The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 1994

Filed:

Nov. 13, 1992
Applicant:
Inventor:

Dae-Il Kim, Kyungki-Do, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G / ;
U.S. Cl.
CPC ...
3151694 ; 315168 ; 313584 ;
Abstract

A plasma display panel includes anodes and barrier ribs formed on an upper face plate, first sustaining electrodes which are formed on a lower rear plate, and covered with a dielectric material, and cathodes which are formed on the dielectric material and connected to the respective capacitors via a common node, thereby serving as second sustaining electrodes. In a driving method of the panel, the first sustaining electrode is supplied with a pulse varying from ground potential to a first positive potential, from the first positive potential back to ground potential, and then from ground potential to a first negative potential, the second sustaining electrode is supplied with a pulse varying from ground potential to the first negative potential, from the first negative potential back to ground potential, and then from ground potential to the first positive potential, the anode is supplied with a writing pulse varying from a third positive potential to a fourth positive potential for data writing, when the pulses of the first and second sustaining electrodes are both at ground potential and the cathode is supplied with a negative scanning pulse varying from a third negative potential to a fourth negative potential, and the cathode is supplied with a negative erasing pulse having an amplitude equal to the difference between the third and fourth potentials, for erasing the written data after a predetermined time has elapsed. Thus, stable memory operation becomes possible.


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