The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 19, 1994
Filed:
Nov. 02, 1992
Applicant:
Inventors:
Masataka Matsui, Tokyo, JP;
Yukihiro Urakawa, Kawasaki, JP;
Assignee:
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307446 ; 307455 ; 307544 ; 307570 ;
Abstract
In a Bi-CMOS logic circuit in which a bipolar transistor and a CMOS element are formed on the same semiconductor substrate, a pull-down current of an output circuit is discharged through a MOS transistor having a large transconductance gm and a constant current source having a large current value. Thus, the speed of a pull-down operation is increased. Moreover, a constant current source need not be provided in an output circuit, and the MOS transistor is operated when it is required during a pull-down operation, thereby reducing an extra current. Therefore, a circuit having low power consumption can be obtained.