The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 1994

Filed:

Mar. 18, 1992
Applicant:
Inventors:

Takehito Yoshida, Moriguchi, JP;

Shinichi Ogawa, Neyagawa, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 25 ; 427 44 ; 427161 ; 427192 ; 427200 ;
Abstract

A method of fabricating a semiconductor device wherein after forming a titanium silicide thin film on a silicon substrate, dopant impurities are implanted into the silicon substrate through the titanium silicide thin film so as to form shallow p.sup.+ -n junctions in the silicon substrate. At least one of the following conditions (1) to (3) is satisfied: (1) forty to seventy percent of the total implant dose is within the n-type silicon substrate; (2) the projected range is set at the depth corresponding to 90% to 125% of the titanium silicide film thickness; and (3) the dopant dose that comes to rest within the n-type silicon substrate is in the range of 2.0.times.10.sup.15 /cm.sup.2 to 3.5.times.10.sup.15 /cm.sup.2.


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Yoshida, Takehito. (1994). Method of fabricating semiconductor device (U.S. Patent No. 5330921). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5330921

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