Apparatus and method for reading, writing, and refreshing memory with

Abstract

A computer memory system is provided. Received memory requests can be for addresses which are virtual or physical. The type of address is determined, and a virtual/physical bit is set and stored. At least row address bits are compared to one or more registers which contain either a virtual or a physical row address, corresponding to a row addressed by a row address latch. When there is a hit with respect to one of these registers, column address bits are used to select the requested memory element, without the necessity for a virtual-to-physical translation. When there is a miss on all registers, a physical address is obtained, either from the requested address when this is physical, or from a virtual-to-physical translation. The physical address is used to load a new row address into a row address latch. Some column address bits are changed only when there has been a miss. A refresh cycle is described, which includes reading back into a row address latch the same row address which occupied the row address latch before the refresh cycle, thus preserving locality information or structure.