The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 1994
Filed:
Jun. 09, 1993
Willibald Meyer, Munich, DE;
Norbert Wirth, Unterschleissheim, DE;
Siemens Aktiengesellschaft, Munich, DE;
Abstract
An integrated semiconductor memory array includes a memory region, a writing buffer memory associated with the memory region, a writing pointer and an input buffer associated with the writing buffer memory, a reading buffer memory associated with the memory region, a reading pointer and an output buffer associated with the reading buffer memory, and a control device being formed of a memory control circuit and a data flow control circuit. A reading column address decoder controlling the reading pointer is associated with the reading buffer memory. A reading address control unit is connected to the reading column address decoder, and a reading address register is connected to the reading address control unit. A writing column address decoder controlling the writing pointer is associated with the writing buffer memory. A writing address control unit is connected to the writing column address decoder, and a writing address register is connected to the writing address control unit. A line address decoder is provided in the memory control circuit or in the memory region and is triggerable by the reading address control unit and the writing address control unit.