Mos semiconductor memory device

Abstract

A MOS semiconductor memory device comprises a semiconductor substrate of a first conductive type; impurity diffused regions of a second conductive type different from the first conductive type formed into a plurality of spaced columns extending in a first direction on one surface of the semiconductor substrate and having functions of bit lines; a plurality of columns of element isolation insulating films formed on the impurity diffused regions of the second conductive type, with active regions formed therebetween; a plurality of MOS transistors formed in the active regions aligned in each of a plurality of rows extending in a second direction substantially perpendicular to the first direction, each MOS transistor including a gate formed on a part of the active region with a gate insulating film therebetween and source and drain formed in the impurity diffused regions of the second conductive type; and word lines each connected electrically to the gates of the MOS transistors aligned in each of the rows and extending in the second direction; wherein, when it is assumed that the plurality of columns are named as first and second columns alternately, the sources of the MOS transistors in adjacent two columns at both sides of the bit line of the first column are all connected to the bit line of the first column, and the drains of the MOS transistors in adjacent two columns at both sides of the bit line of the second column are all connected to the bit line of the second column.