Semiconductor integrated circuit having clock signal generator

Abstract

A semiconductor integrated circuit having a clock signal generator comprising a ring oscillator, a divider, a phase comparator, and an up-down counter. The ring oscillator provides variable oscillation frequencies determined by a sum of the delay times provided by the circuit elements constituting the oscillator. The divider divides the oscillation frequency from the ring oscillator by a specified number. The phase comparator compares the frequency of the signal from the divider with the frequency of the external clock signal. The up-down counter controls the oscillation frequency of the ring oscillator by selectively operating switches connected with the ring oscillator based on the comparison result from the comparator. The clock generator is controlled by an external clock signal to generate an internal clock signal having a higher frequency and outputs both signals. This makes it possible to constitute the semiconductor integrated circuit by using the digital integrated circuit technology alone, thereby allowing the slow operating semiconductors and fast operating semiconductors to exist on the same circuit without sacrificing the excellent characteristics of the latter.