Slew-rate limited voltage controlled oscillator control voltage clamp

Abstract

A clamp circuit for use in a phase-locked loop clock circuit, the phase-locked loop including a phase detector with inputs for reference clock signal and oscillator signal, a loop filter with an input connected to the phase detector, and a voltage-controlled oscillator with an output connected to the phase detector, the clamping circuit connected between an output of the loop filter and an input of the voltage-controlled oscillator, the clamping circuit connected between the loop filter and the voltage-controlled oscillator. The clamping circuit selectively provides, under the control of a clamping signal either a path for the loop through the clamping circuit or clamping the input of the voltage-controlled oscillator to varying potential. The varying potential is provided by a resistor capacitor network. When the loop is closed the capacitor is charged to an average of the loop control voltage for the oscillator. In response to the clamping signal the capacitor is connected to ground, thereby providing an RC time constant varying potential which allows the oscillator to be clamped to a fixed voltage in a slew-rate controlled manner.