The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 1994
Filed:
Oct. 13, 1993
Stephen C Cripps, Sunnyvale, CA (US);
Pacific Monolithics, Inc., Sunnyvale, CA (US);
Abstract
A control network operates a GaAs FET with a quiescent current closer to the maximum output current, I.sub.max, than to zero current. An output network couples the FET to the load and is characterized as having a low impedance at a fundamental frequency and a high impedance lower than an open circuit impedance at at least the second harmonic frequency. As a result, the peak voltage on the output terminal is greater than two times the supply voltage. A preamplifier raises the level of the input signal so that it has a positive voltage peak when biased by the control network and applied to the input terminal. This overdrives the FET and produces an output current that is at the maximum output current level for a longer time during each cycle than the output current is at a minimum level. This enhances the effect of the output network to produce an output voltage spike on the FET that is several times the DC voltage. The amplifier is part of an amplifier system that also includes a switch coupled between the DC supply and the FET that is responsive to a control signal. A circuit is responsive to the input signal for generating the control signal appropriate for disconnecting the DC voltage supply from the FET when there is no input signal.