The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 1994

Filed:

Jul. 22, 1991
Applicant:
Inventors:

David J Foster, White Plains, NY (US);

Armando Garcia, Yorktown Heights, NY (US);

Robert B Pearson, Cold Spring, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395800 ; 395200 ; 395250 ; 395325 ; 395400 ; 395425 ; 364134 ; 364146 ; 3642281 ; 3642284 ; 364229 ; 3642306 ; 3642386 ; 364239 ; 364240 ; 3642546 ; 364D / ; 364D / ;
Abstract

A multiprocessor data processing system (10), and a method of operating same, so as to provide efficient bandwidth utilization of shared system resources (24, 26). The system includes a plurality of processor nodes, each of which includes a data processor (22a, 28a). A first step of a method buffers data written by a data processor to a first bus (23a), prior to the data being transmitted to a second bus (32). Also buffered are byte enable (BE) signals generated by the data processor in conjunction with the data written by the data processor. A next step performs a main memory (26) write operation by transmitting the buffered data to the second bus; responsive to the stored BE signals, also transmitting a control signal for indicating if a memory write is to be accomplished as a read-modify-write (RMW) type of memory operation; and transmitting the stored BE signals to the second bus. A further step couples the data, the RMW signal, and the BE signals from the second bus to a third bus (24) for reception by the main memory.


Find Patent Forward Citations

Foster, David. (1994). Multiprocessor system having local write cache within each data (U.S. Patent No. 5327570). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5327570

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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