The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 1994

Filed:

Jun. 28, 1993
Applicant:
Inventors:

Robert A Eustace, Palo Alto, CA (US);

Judson S Leonard, Waban, MA (US);

Assignee:

Digital Equipment Corporation, Maynard, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
364786 ; 364757 ;
Abstract

A fast binary reduction tree of the type used in high speed digital computer multiplication circuits is disclosed having chunky adders formed by sub-dividing carry propagate adders into chunks of equal bit length such that chunk addition can be initiated in parallel. In the tree, chunky adders with the same chunk size and offset can be cascaded by connecting the carry-outs of one adder to the carry-ins of another, while carry-outs from adders having different offsets can be interleaved to form new partial product terms for input to the next adder level. The chunky adder tree reduces the number of levels without significantly increasing the computation time at each level, thereby increasing the overall computational speed of the circuit.


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