The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 1994

Filed:

Jul. 29, 1993
Applicant:
Inventors:

Mitsuo Komoto, Tokyo, JP;

Hiroshi Endoh, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K / ; H01R / ; H01R / ;
U.S. Cl.
CPC ...
361760 ; 361761 ; 361785 ; 361791 ; 439 44 ; 439 46 ;
Abstract

An LSI package structure with high efficiency of the power supply and fast transmission of the signal is provided in which: adjacent to a pin 8 side surface of an LSI package 1, a power supply member 2 having an electrically conductive portions 6 and 7 for power supply bus and ground bus respectively, and a flexible interconnection board 3 having a power supply pattern layer 3b and a ground pattern layer 3a connected to the portions 6 and 7 respectively via a pin 9, are disposed; the pins 8 and 9 each extend through a through hole 3c formed on the interconnection board 3, the power supply pattern layer 3b and the pins 8 and 9 for power supply being interconnected within the through hole, the ground pattern layer 3a and the pins 8 and 9 for grounding being interconnected within the through hole; and the signal input/output pin 8 and a connector 5 of a signal input/output coaxial cable 5a are interconnected at the side of the interconnection board 3 oppsite the LSI package 1.


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