The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 1994
Filed:
May. 19, 1992
Applicant:
Inventors:
Assignee:
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; H03K / ;
U.S. Cl.
CPC ...
307443 ; 307449 ; 307463 ;
Abstract
A multiplexer circuit comprises a plurality of circuits for decoding digital timing signals, and a plurality of circuits for passing an one of the analogue voltage potentials to an output terminal corresponding to the decoded result of the decoding circuits, and preventing the passing circuits from passing more than one signal simultaneously.
Yamada, Shigeru. (1994). Multiplexer circuit less liable to malfunction (U.S. Patent No. 5327022). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5327022
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile