The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 1994
Filed:
Jul. 06, 1993
Applicant:
Inventor:
Michael J McNutt, El Toro, CA (US);
Assignee:
Loral Fairchild Corp., Syosset, NY (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257229 ; 257232 ; 257451 ; 257455 ;
Abstract
Methods and apparatus for implementing charge skimming and variable integration time in focal plane arrays formed in a silicon substrate. The present invention provides for pulsing a field plate that lies over a diode disposed in the substrate in order to provide for charge skimming and variable integration time. The field plate is normally dc biased to suppress diode edge leakage. No additional structure is needed in the silicon substrate, and basic readout clocking is unaffected. Any interline transfer focal plane array can benefit from using the principles of the present invention.