The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 1994
Filed:
Dec. 31, 1992
Ronald E Chappelow, Jeffersonville, VT (US);
Edward W Conrad, Jeffersonville, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
The present invention provides a device which can identify and measure both thermally induced errors and system induced errors in a measuring system, especially a photolithographic system for processing semiconductor wafers. The system includes a stage having associated therewith a first material having a known, relatively high, coefficient of thermal expansion (CTE) and a second material having a significantly lower (preferably zero) CTE in the temperature range in which the system is to be used. The system has a 'home' position or location. At least one first indicia mark or set of marks is placed on the first material at a given known (calibrated) distance(s) (at a given known temperature) from the 'home' position, and at least one second indicia mark or set of marks is placed on the second material at a given known (calibrated) distance(s) from the home position. The system is configured to periodically measure (even during wafer processing) the distances between each of the indicia marks and the 'home' position. By periodically measuring these distances and checking them against their calibrated values, the system can determine, measure and distinguish both system induced errors and temperature induced errors.