The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 1994

Filed:

Mar. 30, 1992
Applicant:
Inventor:

Takatoshi Kurano, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J / ;
U.S. Cl.
CPC ...
370112 ; 370 581 ;
Abstract

On time division multiplexing first through N-th input signals, each having a bit rate V to represent successive ATM cells, a multiplexing section (12, 13') multiplexes the first through the N-th input signals and a dummy input signal into a time division multiplexed signal having another bit rate V.times.(N+1) and comprising first through N-th multiplexed cells and a dummy multiplexed cell. The first through the N-th and the dummy multiplexed cells are derived from the first through the N-th and the dummy input signals, respectively. A controller (16') successively writes valid cells of the first through the N-th multiplexed cells in an FIFO memory (15) as written cells at a writing rate equal to the bit rate V.times.(N+1) for a writing time interval defined by the first through the N-th multiplexed cells and reads the written cells from the FIFO memory in a first-in first-out order as a read-out signal at a reading rate equal to the bit rate V.times.(N+1) for a reading time interval defined by the dummy multiplexed cell. A converter (17) converts the read-out signal into a multiplexed output signal having the bit rate V.


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