The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 1994

Filed:

Nov. 30, 1992
Applicant:
Inventors:

Akira Matsuzawa, Neyagawa, JP;

Haruyasu Yamada, Hirakata, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M / ; H03M / ; H03M / ;
U.S. Cl.
CPC ...
341161 ; 341155 ; 307 38 ; 307 39 ; 330252 ;
Abstract

Analog-to-digital conversion method and device using triangular vertex solution are disclosed. The method includes the steps of defining a first and a second boundary value between which a quantity to be analog-to-digital converted resides, multiplying a difference between the first boundary value and the quantity to be converted by a first coefficient to produce a first physical quantity, multiplying a difference between the second boundary value and the quantity to be converted by a second coefficient to produce a second physical quantity, comparing the first and second physical quantities to obtain a comparison result, and logically converting the comparison result into a digital value. The device includes a first differential converting circuit for generating one or more voltages, which are produced by multiplying a potential difference between a first reference voltage and an input analog voltage by a chain of first coefficients, a second differential converting circuit for generating one or more voltages, which are produced by multiplying a potential difference between a second reference voltage and the input analog voltage by a chain of second coefficients, and a comparator circuit for comparing output voltages of the first and second differential converting circuits, with the output of the comparator circuit being logically converted into a digital value.


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