The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 1994
Filed:
Apr. 10, 1992
Stephen C Carlton, Plano, TX (US);
Paul A Elias, Plano, TX (US);
Alcatel Network Systems, Inc., Richardson, TX (US);
Abstract
In a plurality of working interface circuits (12-19), each circuit has at least one transmitter (86) and at least one receiver (88). A spare interface circuit (35) has at least one transmitter (158) and at least one receiver (154). A switch circuit (21) is coupled to the working interface circuits (12-19) and the spare interface circuit (35) and includes a plurality of switches (110-117; 109; 122, 138, 130, 150) which are operable to create a selected one of at least two data paths. A first of these data paths may be selectively formed from a selected one of the working interface circuits (12-19) to the spare interface circuit (35) to monitor the operation of the selected one of the working interface circuits (12-19) without affecting any communications signal transmitted by that working interface circuit. Another data path may be selectively established from a malfunctioning one of the working interface circuits (12-19) to the spare interface circuit (35). For substituting at least a portion of the spare interface circuit (35) for a like portion of malfunctioning one of the working interface circuits (12-19). In a preferred embodiment, a third data path may be selectively established from the spare interface circuit, through the switch circuit and back to the spare interface circuit to monitor the operation of the spare circuit (21).