The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 1994
Filed:
Mar. 15, 1993
Atsushi Hori, Moriguchi, JP;
Mizuki Segawa, Yawata, JP;
Hiroshi Shimomura, Moriguchi, JP;
Shuichi Kameyama, Itami, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
Insulating films formed on side walls of a gate electrode are removed for a self-alignment to selectively implant impurities only into end portions of a source region and a drain region. Therefore, p.sup.+ -type semiconductor regions are selectively formed only on sides near a channel region of the source and the drain regions. A punch through of the source or drain region is prevented by the p.sup.+ -type semiconductor regions controlling an inversion threshold voltage. Therefore, the impurity concentration of the p-type substrate can be settled low, and the semiconductor transistor device can be miniaturized without increasing a parasitic junction capacitance. Moreover, since the impurity concentration in the channel region is ununiform, a drivability of the transistor can be increased. As a result, a semiconductor transistor device with a high withstand voltage and a high drivability in which the inversion threshold voltage can be easily controlled, and a method for producing the same are provided.