The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 1994
Filed:
May. 08, 1991
Giuliano Imondi, Rieti, IT;
Giulio Marotta, Rieti, IT;
Giulio Porrovecchio, Rieti, IT;
Giuseppe Savarese, Rieti, IT;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
Circuitry and a method are provided for selectively switching a negative voltage (-V.sub.nn) to portions of CMOS integrated circuits, which circuitry comprises a switching/decoding matrix. The switching/decoding matrix comprises a control and decode logic (CDL) which controls signal VPPENABLE to control a positive charge pump (PCP) producing positive voltage (+V.sub.pp) and which further controls signal VNNENABLE to control a negative charge pump (NCP) producing said negative voltage (-V.sub.nn). The switching/decoding matrix further comprises, for each line to be switched, a switching module which comprises a PMOS transistor (PS) having its source connected to said line and its drain connected to receive said negative voltage (-V.sub.nn) produced by said negative charge pump (NCP). The PMOS transistor (PS) gate is driven by a drive circuit being in turn driven by said control and decode logic (CDL) and connected so as to receive the positive voltage (+V.sub.pp) provided by said positive charge pump (PCP).