The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 1994
Filed:
Feb. 10, 1993
Carl Cederbaum, Versailles, FR;
Philippe Girard, Corbeil-Essonnes, FR;
International Business Machines Corporation, Armonk, NY (US);
Abstract
A low power TTL/CMOS receiver circuit consists of four stages, each of which is, respectively, comprised of at least two complementary FET devices connected to each other in series. The various stages control each other by a variety of feedback interconnections. The use of feedback loops permits to significantly decrease the DC current in the input stage of the receiver circuit. It also realizes a substantial decrease in AC current consumption, although less significantly. Finally, delay variations between input and output signals are obtained as well as substantial improvements in the symmetry between the true and complement output signals of the receiver circuit.