The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 31, 1994
Filed:
Nov. 12, 1992
Daniel E Utley, Anderson, IN (US);
Kevin M Deasy, Noblesville, IN (US);
Gordon D Cheever, Jr, Kokomo, IN (US);
General Motors Corporation, Detroit, MI (US);
Delco Electronics Corp., Kokomo, IN (US);
Abstract
A multi-processor AC motor control system having a timer processor which generates multiple synchronized PWM waveforms while minimizing software latency effects. The timer processor generates a 50% PWM duty cycle sync signal at the PWM frequency, creating a logic level transition (leading edge) in each PWM period. At each such transition, the timer processor interrupts the host processor for the purpose of updating a multi-byte timer data register with PWM on-time data stored in nonvolatile memory as a function of machine position and requested current. A separate timer channel is provided for each PWM waveform to be generated, and the timer processor sets off-to-on and on-to-off transitions of each waveform in accordance with the updated PWM on-time data such that respective off-to-on and on-to-off transitions in each waveform are centered about the leading edges of the sync signal. If the on-time is 0% or 100%, the timer processor overrides the normal instruction set and forces the logic state of the waveforms to a full-off or full-on logic state.