The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 1994

Filed:

Apr. 22, 1992
Applicant:
Inventors:

Junji Tanaka, Sakurai, JP;

Toshio Watanabe, Kita-Katsuragi, JP;

Yukihisa Orisaka, Tenri, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
307353 ; 307359 ; 328151 ;
Abstract

Disclosed is a sample-and-hold circuit. A plurality of input signals are applied to the capacitors through the corresponding analog switches. The capacitors are charged to the instantaneous voltages of input signals when the corresponding analog switches are conducting. An output circuit comprising a plurality of input circuit legs and an output is provided. Each input circuit leg includes series connected input transistor and switching transistor. Input circuit legs are connected in parallel. A plurality of inputs of the switching trainsistors are supplied with input switching signals to turn on the switching transistors in a systematic chosen sequence. And a plurality of inputs of the input transisntrs are connected to the capacitors to put the voltage across one of the capacitors to the output during the time when the corresponding analog switch is in the hold mode and the corresponding switch transisor is conducting.


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