The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 1994

Filed:

Jun. 19, 1992
Applicant:
Inventors:

Ron J Bilas, Cedar Rapids, IA (US);

Drew A Reid, Cedar Rapids, IA (US);

Martin J Wittrock, Belle Plaine, IA (US);

Assignee:

Square D Company, Palatine, IL (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G05B / ;
U.S. Cl.
CPC ...
364140 ; 364184 ; 364483 ; 364492 ;
Abstract

An energy management loadpanel arrangement includes a load panel enclosure having a plurality of circuit breakers, each of which opens and closes in response to a control signal so as to interrupt an associated current path. A microcomputer generates the control signals to control the position of the circuit breakers and their associated current paths, and a volatile memory circuit, for example, RAM, stores time-event data which is used to indicate when the control signals should be generated. A charged electronic double-layered capacitor is coupled to the volatile memory so that, in the event of a power outage, operating power is provided to the volatile memory for extended periods of time. In this manner, the time-event data is retained during the power outage so that the circuit breakers are timely controlled, despite the power outage, in response to said control signals. A real time clock circuit is used to track the time, and the charged electronic double-layered capacitor is coupled to the real time clock circuit so that it also continues to operate during a power outage. The microcomputer is then used to periodically store an image of the current time, from the real time clock, in RAM during normal operation, so that after a power outage and when the microcomputer 120 recovers therefrom, the current value of the real time clock can be compared against this value stored in RAM and the microcomputer's duration timers can be corrected.


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