The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 24, 1994
Filed:
Jun. 30, 1992
David E Boden, San Jose, CA (US);
Mandy M Fong, San Jose, CA (US);
John M McReynolds, San Jose, CA (US);
Loral Aerospace Corp., New York, NY (US);
Abstract
High speed transfer of data over any distance can be easily achieved using high speed optical fibers and an optical fiber interface that couples signals transferred using the optical fibers to and from a computer. A specific implementation of the present invention is a fiber optic interface for a Macintosh brand computer that provides a direct fiber optic interface having no parts external to the computer that couples data to and from an optical image storage unit. The fiber optic interface circuit comprises an optical receiver coupled to a fiber optic cable for receiving optical signals from the image storage unit that converts them into corresponding electrical signals. An optical transmitter is coupled to a second fiber optic cable for converting electrical signals derived from the computer into optical signals and for transmitting them to the image storage unit. A plurality of data buffers are provided for buffering the electrical signals received from the optical receiver and to be transmitted by the optical transmitter. A compression circuit is provided for compressing the electrical signals generated by the optical receiver. A data buffer is provided for buffering the data signals received thereby. An interface circuit is provided for interfacing between the data buffer and a computer bus or backplane that forms a part of the computer.