The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 24, 1994
Filed:
May. 26, 1993
Robert S Broughton, Beaverton, OR (US);
NEC America, Inc., Hillsboro, OR (US);
Abstract
An adaptive clock duty cycle controller which generates a dc error signal that is supplied to a logic device, such as a logic inverter or a logic buffer, which outputs a specified duty cycle clock signal. The output of the logic device is supplied to a positive peak detector, a negative peak detector and an average signal level detector. The output of the positive peak detector and the negative peak detector are supplied to a mid-peak generating circuit which generates a signal for setting and maintaining the desired duty cycle. The signal output by the average signal level detector represents the average value of the output of the logic device. The signal output by the mid-peak generating circuit is compared with the signal output by the average signal level detector by an operational amplifier. The output of the operational amplifier represents the error signal which is supplied back to the input of the logic device to control the output of the logic device to the desired duty cycle.