The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 1994
Filed:
May. 11, 1993
Hilda Kanber, Rolling Hills Estates, CA (US);
Hughes Aircraft Company, Los Angeles, CA (US);
Abstract
Optoelectronic devices (16) are formed on a first surface (12) of a gallium arsenide substrate (10) using selective ion implantation. Signal processing devices may be formed on a second, opposite surface (14) of the substrate (10) using selective ion implantation (38) and/or selective epitaxy (22,24),(40). Vertical interconnects (34,46) are formed between the first and second surfaces (12,14). Alternatively, a gallium arsenide buffer layer (54) may be grown on the first surface (12) of the substrate (10), and the signal processing devices formed on the buffer layer (54) using selective ion implantation (58,60,62) and/or selective epitaxy (76,78,80,82). Dielectric (50) and/or conductive metal (52) layers may be formed on selected areas of the first surface (12), and the buffer layer (54) grown from exposed areas (56) of the first surface (12) over the dielectric (50) and/or metal (52) layers using lateral epitaxial overgrowth organometallic chemical vapor deposition. The signal processing devices may be formed in areas of the buffer layer (54) which overlie the exposed areas (56) of the substrate (12), and/or over the dielectric (50) and/or metal (52) layers. The present method enables metal-semiconductor field effect transistors (MESFET), high electron mobility transistors (HEMT) and heterojunction bipolar transistors (HBT) to be monolithically integrated in a vertical fashion for close packing density.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile