Receiver of a direct sequence spread spectrum system

Abstract

A receiver of a direct sequence spread spectrum system includes a period counter for counting a period of a system clock, and outputting a data demodulation signal approximately every half-PN period, a peak detector for detecting a peak in the output from an adder until reaching a data demodulation point for every data demodulating period, and outputting the value of the peak to the period counting means, a peak position detector for recognizing the detection of the peak in the peak detecting means, storing a current position of the peak from the period counting means, and then providing the peak position at a data demodulation point after the ending of one period, a timing recovery circuit for receiving position information about the current peak position from the peak position detecting means when beginning every data demodulation operation, and controlling the period counting means to move the peak position to allow the peak position of the following period to be observed in a desired position, and demodulator for demodulating the data whenever the peak is observed. Thus, the data can be stably demodulated by compensating for the influence due to a clock differential between the transmitting and receiving stages or fading.