The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 1994

Filed:

Sep. 18, 1992
Applicant:
Inventors:

Alberto Poma, Pavia, IT;

Vanni Poletto, Casale Monferrato, IT;

Marco Morelli, Livorno, IT;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M / ;
U.S. Cl.
CPC ...
363 63 ; 363 56 ;
Abstract

An H-bridge circuit which includes four power transistors (an npn pull-down and a pnp pull-up for each of the output terminals). Two control circuits are connected to drive these transistors in a complementary crossover configuration, so that each control circuit can turn on the pull-up transistor on one side of the load and the pull-down transistor on the opposite side of the load. Each of the power transistors is paralleled (base-to-base) by a smaller transistor which provides a scaled current output (proportional to that of the corresponding power transistor) to the opposite control circuit. The control circuit includes static current-thresholding disable logic, which prevents turn-on until the currents through the opposite power devices have declined to threshold levels. Thus, as long as either control circuit is driving one of the pull-up transistors into in the on-state, the other control circuit will not be able to turn on the pull-down transistor which is in series with the active pull-up transistor. This efficiently prevents any condition of unlimited crowbar current, without adding any excess delay or causing any high-impedance condition at the output.


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