The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 1994

Filed:

Sep. 28, 1992
Applicant:
Inventors:

Masahiro Mimura, Tokyo, JP;

Makoto Hasegawa, Tokyo, JP;

Kazunori Watanabe, Yokohama, JP;

Hiroyuki Harada, Kanazawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D / ;
U.S. Cl.
CPC ...
329302 ; 329303 ; 375 80 ; 375 88 ;
Abstract

An FSK demodulator for demodulating first and second baseband signals obtained from a received frequency shift keying signal, the first and second baseband signals having a quadrature relation therebetween, a lead and lag relation between the first and second baseband signals being changed in accordance with frequency shift from a carrier frequency of the frequency shift keying signal, comprises: a voltage change judging circuit for judging whether a magnitude of the first baseband signal increases or decreases within a predetermined interval; and an inverting circuit responsive to an output of the voltage change judging circuit and the second baseband signal for outputting a demodulated signal produced by inverting the second baseband signal in accordance with the output of the voltage change judging circuit. In addition, a second voltage change judging circuit and a second inverting circuit and a combining circuit for combining the results of said first and second inverting circuits may be provided to improve noise resistance. Inflection points in the baseband signal are detected to select one output from the first, second inverting circuit and the combining circuit in accordance with detection of the inflection points.


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