The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 1994

Filed:

Oct. 29, 1991
Applicant:
Inventors:

Yasuhiro Murasawa, Itami, JP;

Syuniti Uemura, Itami, JP;

Hajime Maeda, Itami, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257685 ; 257723 ; 257724 ;
Abstract

A semiconductor device includes a package substrate, a first IC package having external lead terminals which are downwardly bent with respect to a plane surface of the package and a second IC package having external lead terminals which are upwardly bent with respect to a plane surface of the package. These packages are disposed on one surface of the package substrate parallel to each other. One or more pairs of the external lead terminals of the first and second IC packages, which face each other and are electrically connected with to each other, are disposed on the same mount pads provided on the package substrate. Therefore, wires for connecting those lead terminals can be dispensed with and the other external lead terminals can be connected by simply drawing around wires without providing through holes. In addition, no positional deviation between the two packages, occurs and no solder bridges are created during soldering.


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