The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 1994
Filed:
Dec. 12, 1991
Bernard L Morris, Allentown, PA (US);
AT&T Bell Laboratories, Murray Hill, NJ (US);
Abstract
Prior-art high speed TTL-to-CMOS input buffers consume a large amount of power supply current through the input transistors when the input voltage is held at a mid-range level between V.sub.DD and V.sub.SS (e.g., 2.0 volts). The inventive input buffer includes a resistance in series with the p-channel pull-up transistor on the input inverter, in order to limit this current. In addition, to retain high operating speed, a p-channel shunt transistor is placed in parallel with the resistance, and controlled by the buffer output signal. This shunt transistor effectively bypasses the resistance from the circuit when the buffer output goes low, thereby providing high operating speed.