The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 1994
Filed:
Dec. 17, 1992
Attilio J Rainal, Morristown, NJ (US);
AT&T Bell Laboratories, Murray Hill, NJ (US);
Abstract
By on-chip modification of a conventional balanced driver to yield special voltage levels, the power dissipation of a balanced, terminated transmission line circuit can be reduced by 50% or more relative to a conventional balanced driver or 25% or more relative to a conventional unbalanced driver. This reduction in power dissipation not only applies to point-to-point interconnections but also applies to bused interconnections. The low power balanced driver circuit can be implemented using ECL, BiCMOS, GaAs and CMOS technologies and no modifications are needed to the associated differential line receiver. Thus, the significant benefits of balanced interconnections, namely reduced crosstalk, increased noise immunity, and elimination of ground noise can be realized with a significant reduction in power dissipation.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile