The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 1994

Filed:

Feb. 16, 1988
Applicant:
Inventors:

Surender S Magar, Colorado Springs, CO (US);

Michael E Fleming, Colorado Springs, CO (US);

Shannon N Shen, Colorado Springs, CO (US);

Kevin M Kishavy, Colorado Springs, CO (US);

Christopher D Furman, Colorado Springs, CO (US);

Kenneth N Murphy, Colorado Springs, CO (US);

Assignee:

Array Microsystems, Colorado Springs, CO (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364726 ;
Abstract

A digital array signal processor and an associated method are described for implementing the fast Fourier transform radix-4 butterfly algorithm. The digital array signal processor is an integrated circuit with a four stage pipeline and can perform a radix-4 butterfly operation on four complex operands every 80 nanoseconds. Using the decimation-in-frequency implementation of the radix-4 butterfly algorithm, the digital array signal processor includes a first stage for distribution of complex input operand values, a second stage for performing addition and subtraction operations, a third stage for performing multiplication operations and a fourth stage for distribution of the output operand values. The digital array signal processor can be reconfigured to perform a radix-2 butterfly operation on two sets of two complex numbers during the 80 nanosecond machine cycle as well as frequently used arithmetic and logic operations. The digital signal array processor can be configured to perform a series of operations on an array of operands or can be one of a series of processors, each processor performing a separate operation on an operand array. According to a second implementation, the digital array signal processor can perform the radix-4 butterfly algorithm using the decimation-in-time algorithm.


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