Load controller with digitally modeled overload protection and analog

Abstract

Microprocessor based apparatus for controlling an electrical load, such as a motor, includes an external capacitor for storing an analog equivalent of a digitally modeled heat state signal, such as the I.sup.2 t characteristic of the motor. The voltage on the capacitor decays to mimic motor cooling when the microprocessor is powered down with deenergization of the motor. The stored analog signal is updated by periodically converting the analog signal to a retrieved digital heat state signal which is compared to the latest calculated value of the heat state signal. If the retrieved value is below the present calculated value, an input/output port is set to a high output state to charge up the storage capacitor. If the retrieved value is above the calculated value, the port is configured as an output port with a low state to reduce the voltage on the capacitor. When the retrieved heat state signal equals the calculated signal, the port is configured as an input port with a high impedance to maintain the stored value on the capacitor. To maintain accuracy over a wide range with an 8-bit processor, the selected limiting value of the I.sup.2 t characteristic is loaded into a large register and shifted n bits toward the most significant bit of the register until a ONE appears on the most significant bit. On power-up the 8-bit retrieved heat state signal is then loaded into the most significant bits of the register and shifted the n bits away from the most significant bit to bring it into the range of the selected limit value for the I.sup.2 t characteristic. For updating the stored heat state signal, the latest calculated heat state signal is shifted n bits toward the most significant bit for comparison with the retrieved digital heat state signal.