The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 1994
Filed:
May. 11, 1992
Applicant:
Inventors:
Ali Iranmanesh, Sunnyvale, CA (US);
John M Pierce, Palo Alto, CA (US);
Assignee:
National Semiconductor Corporation, Santa Clara, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437195 ; 437194 ; 437199 ; 437228 ; 156643 ; 156653 ;
Abstract
A method is provided for planarizing the surface of an integrated circuit over a metal interconnect layer. Metal interconnect lines and surrounding regions of a partially fabricated integrated circuit are first coated with a thin layer of dielectric substantially free of voids and then coated with a polysilicon layer. The polysilicon layer is planarized back to the level of the dielectric layer on top of the interconnects, providing a substantially planar surface for subsequent fabrication steps including deposition of a second dielectric layer and an overlying metal layer.