The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 1994

Filed:

Sep. 18, 1992
Applicant:
Inventors:

Kiyotaka Imai, Tokyo, JP;

Hiroshi Hirabayashi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
437 31 ; 148D / ; 257592 ;
Abstract

In a method for manufacturing a bipolar transistor with the SST structure in which a P-type base region consists of a P.sup.+ -type extrinsic base region, a P-type link base region and a P-type intrinsic base region, a silicon oxide film, for example, is formed in advance in a formation region of the P-type link base region and the P-type intrinsic base region on the surface of an N-type epitaxial layer, and a P.sup.+ -type polycrystalline silicon film and a silicon nitride film that cover at least the formation region of the P-type base region are formed. An emitter opening surrounded by a gap part and a base lead-out electrode consisting of the P.sup.+ -type polycrystalline silicon film are formed. A P.sup.+ -type extrinsic base region and a P-type intrinsic base region are formed by applying heat treatment after forming a BSG film on the surface so as to fill in the gap part. A spacer consisting of the BSG film is formed on the side face of the emitter opening, and an emitter lead-out electrode consisting of the N.sup.+ -type polycrystalline silicon film is formed. By applying a heat treatment again, a P-type link base region and an N.sup.+ -type emitter region are formed.


Find Patent Forward Citations

Imai, Kiyotaka. (1994). Method of manufacturing high speed bipolar transistor (U.S. Patent No. 5302535). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5302535

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