The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 1994

Filed:

May. 20, 1991
Applicant:
Inventor:

Naokazu Miyawaki, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365233 ; 307465 ; 36523008 ;
Abstract

A control circuit for controlling an operation mode in a pseudo-static RAM. A chip enable control circuit generates a first group of control signals in synchronism with a change in level of a chip enable signal. A second control circuit receives a chip select signal and the first group of control signals, latches a chip select signal on the basis of a signal of the first group of control signals, and generates a second control signal in accordance with the latched signal. A third control circuit controls a write enable signal with an inverted replica of the second control signal and an inverted replica of a predetermined one of the first control signals in the first group of control signals.


Find Patent Forward Citations

Miyawaki, Naokazu. (1994). Control circuit for controlling an operation mode in a pseudo-static ram (U.S. Patent No. 5301164). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5301164

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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