The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 1994

Filed:

Jun. 29, 1993
Applicant:
Inventors:

Marco Demicheli, Binago, IT;

Alberto Gola, Broni, IT;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
257546 ; 257503 ; 257545 ; 257547 ; 257552 ; 257553 ; 257565 ; 3072762 ; 3072966 ; 3073031 ;
Abstract

A bias structure for an integrated circuit including first and second transistors having emitter terminals coupled respectively to the supply and to a terminal of a resistor whose potential, under certain operating conditions of the circuit, exceeds the supply voltage; base terminals connected to each other and to a current source; and collector terminals connected electrically (12) to an epitaxial tub housing the resistor. A resistor is preferably provided between the two collectors, so that, when the potential of the terminal of the resistor exceeds the supply voltage, the second transistor saturates and maintains the epitaxial tub of the resistor at a potential close to that of the resistor terminal, thus preventing the parasitic diode formed between the resistor and the epitaxial tub from being switched on.


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