Method and apparatus for the mapping of physically non-contiguous memory

Abstract

A method and apparatus for use in read/write operations by a processor that reads and writes information in first and second address formats. The method and apparatus include a memory and a memory mapper for remapping according to a predetermined scheme those memory fragments not containing information stored in the first address format. Memory fragments are thus accessible to the processor for reading and writing information in the second address format. Such remapping operation results in the memory fragments appearing logically contiguous. In the preferred embodiment, the first address format is an x-y address format and the second address format is a linearly addressable format. An alternative embodiment discloses the use of a second memory for reading and writing information in the second address format. In that embodiment, the memory mapper remaps the memory fragments to appear logically contiguous with said second memory. The invention finds particular utility in conjunction with a graphics processor system. In such a system, the memory mapper is a programmable array logic device and the memory is VRAM memory. In certain situations it is preferred to remap that portion of the memory where information is to be stored in the first address format so that the first information signal is stored in locations which are physically contiguous.