The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 08, 1994
Filed:
Jul. 06, 1993
Eric G Stevens, Rochester, NY (US);
Stephen L Kosman, Rochester, NY (US);
Paul L Roselle, Webster, NY (US);
Eastman Kodak Company, Rochester, NY (US);
Abstract
A method of making a two-phase charge coupled device (CCD) includes forming a layer of a conductive material over and insulated from the surface of a body of a semiconductor material of one conductivity type having a channel region of the opposite conductivity type in the body and extending to the surface. Sections of a first masking layer are formed on the conductive material layer spaced along the channel region. A conductivity modifying dopant is implanted into the channel region through the spaces between the sections of the first masking layer. A layer of a second masking layer is formed over the sections of the first masking layer and on the surface of the conductive material layer in the spaces between the sections of the first masking layer. A layer of indium-tin oxide (ITO) is formed over the portions of the second masking layer which extend across the ends of the sections of the first masking layer, and a layer of carbon is formed on the second masking layer between the ITO layers. The ITO layers along the ends of the sections of the first masking layer are then removed, and exposed portions of the second masking layer are removed. The portions of the conductive material layer under the removed portions of the second masking layer are then removed so as to leave the conductive material layer divided into individual very closely spaced apart (submicron spacing) gate electrodes.