The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 01, 1994
Filed:
May. 04, 1992
Applicant:
Inventor:
Takahiko Arakawa, Hyogo, JP;
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
257208 ; 257202 ; 257203 ; 257207 ; 257210 ; 257211 ;
Abstract
A gate array semiconductor integrated circuit device allowing less clock skews is disclosed. The device includes a clock signal driver formed in the part under a power supply interconnection for input-output buffer in a power supply pin region or a ground pin region. The clock signal driver is formed in the power supply pin region and so on which, conventionally, was not utilized, so that the clock signal driver can be large enough to provide a clock signal to each basic cell column. Therefore, the input-output buffer region is not unduly occupied by the clock signal driver, and the connecting pads do not become useless.