The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 1994

Filed:

Aug. 10, 1992
Applicant:
Inventors:

Takashi Kanai, Chiba, JP;

Kaneaki Fujishita, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F / ;
U.S. Cl.
CPC ...
307243 ; 307350 ; 307355 ;
Abstract

A signal input selecting circuit comprises a plurality of signal input terminals, a first switch device for selecting one of signal electrodes of the signal input terminals to be connected with a signal processing block, a second switch device for selecting one of reference electrodes of the signal input terminals to be connected with a reference potential point, a third switch device for connecting the second switch device with a current supplying portion, and a voltage detector for detecting a voltage corresponding to an impedance of the second switch device. When the voltage detected by the voltage detector has a level thereof less than a predetermined level under a condition in which the second switch device is in operation to connect the reference electrode of a selected one of the signal input terminals with the reference potential point and the third switch device is in operation to connect the second switch device with the current supplying portion, the third switch device is turned to disconnect the switch device from the current supplying portion and the first switch device is caused to connect the signal electrode of the selected one of the signal input terminals with the signal processing block.


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