The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 1994

Filed:

Apr. 28, 1992
Applicant:
Inventors:

John M Pierce, Palo Alto, CA (US);

Peter H Renteln, Cupertino, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B24D / ;
U.S. Cl.
CPC ...
51401 ; 51395 ;
Abstract

A polishing pad and a method for polishing semiconductor wafers. The polishing pad includes a polishing layer and a rigid layer. The rigid layer adjacent the polishing layer imparts a controlled rigidity to the polishing layer. The resilient layer adjacent the rigid layer provides substantially uniform pressure to the rigid layer. During operation, the rigid layer and the resilient layer apply an elastic flexure pressure to the polishing layer to induce a controlled flex in the polishing layer to conform to the global topography of the wafer surface while maintaining a controlled rigidity over the local topography of the wafer surface.


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